14 research outputs found

    Prototyping the recursive internet architecture: the IRATI project approach

    Get PDF
    In recent years, many new Internet architectures are being proposed to solve shortcomings in the current Internet. A lot of these new architectures merely extend the current TCP/IP architecture and hence do not solve the fundamental cause of these problems. The Recursive Internet Architecture (RINA) is a true new network architecture, developed from scratch, building on lessons learned in the past. RINA prototyping efforts have been ongoing since 2010, but a prototype on which a commercial RINA implementation can be built has not been developed yet. The goal of the IRATI research project is to develop and evaluate such a prototype in Linux/OS. This article focuses on the software design required to implement a network stack in Linux/OS. We motivate the placement of, and communication between, the different software components in either the kernel or user space. The first open source prototype of the IRATI implementation of RINA will be available in June 2014 for researchers, developers, and early adopters

    Prototipo de RINA sobre Ethernet

    No full text
    Este PFM se enmarca dentro del trabajo a realizar por el proyecto IRATI. IRATI es un proyecto STReP (Specific Targeted Research Project) financiado por la Unión Europea dentro del programa FP7 (Seventh Framework Programme for Research and Technological Development). El objetivo general de IRATI es conseguir una mayor compresión y exploración de RINA. El trabajo que se reportará en este PFM es (aproximadamente) la primera fase del diseño y desarrollo de un prototipo de RINA sobre Ethernet en el seno del Kernel (Linux), basándose y generando software libre.Aquest PFM s'emmarca dins del treball a realitzar pel projecte IRATI. IRATI és un projecte STREP (Specific Targeted Research Project) finançat per la Unió Europea dins del programa FP7 (Seventh Framework Programme for Research and Technological Development). L'objectiu general d'IRATI és aconseguir una major compressió i exploració de RINA. El treball que es reportarà en aquest PFM és (aproximadament) la primera fase del disseny i desenvolupament d'un prototip de RINA sobre Ethernet en el si del Kernel (Linux), basant-se i generant programari lliure.Master thesis for the Free Software program

    Prototipo de RINA sobre Ethernet

    No full text
    Este PFM se enmarca dentro del trabajo a realizar por el proyecto IRATI. IRATI es un proyecto STReP (Specific Targeted Research Project) financiado por la Unión Europea dentro del programa FP7 (Seventh Framework Programme for Research and Technological Development). El objetivo general de IRATI es conseguir una mayor compresión y exploración de RINA. El trabajo que se reportará en este PFM es (aproximadamente) la primera fase del diseño y desarrollo de un prototipo de RINA sobre Ethernet en el seno del Kernel (Linux), basándose y generando software libre.Aquest PFM s'emmarca dins del treball a realitzar pel projecte IRATI. IRATI és un projecte STREP (Specific Targeted Research Project) finançat per la Unió Europea dins del programa FP7 (Seventh Framework Programme for Research and Technological Development). L'objectiu general d'IRATI és aconseguir una major compressió i exploració de RINA. El treball que es reportarà en aquest PFM és (aproximadament) la primera fase del disseny i desenvolupament d'un prototip de RINA sobre Ethernet en el si del Kernel (Linux), basant-se i generant programari lliure.Master thesis for the Free Software program

    Embedded video compression for high dynamic range video

    No full text
    Modern digital TV-systems encompass digital demodulation and required audiovisual signal processing incorporating an uni ed-memory architecture. The bottleneck of such a System-on-Chip (SoC) is the connection to the external memory. As the video signal consumes the majority of the involved bandwidth, embedded video compression allows bandwidth reduction, enabling cost e ective systems. The embedded video compression must be visual lossless and cost e ective. This requires a high e cient de-correlation step to limit the amount of quantization, thus avoiding a decrease of picture quality. In this thesis, video characterization has been conducted, resulting in novel video de-correlation concepts. Based on these concepts, a DCT-based codec exploiting symmetrical features, structure repetitions and prediction techniques in the DCT transform domain has been developed. From the results it can be concluded, that symmetrical features turn out to be an e cient method to compress video, preserving the demanded high picture quality at acceptable computational cost

    Embedded video compression for high dynamic range video

    No full text
    Modern digital TV-systems encompass digital demodulation and required audiovisual signal processing incorporating an uni ed-memory architecture. The bottleneck of such a System-on-Chip (SoC) is the connection to the external memory. As the video signal consumes the majority of the involved bandwidth, embedded video compression allows bandwidth reduction, enabling cost e ective systems. The embedded video compression must be visual lossless and cost e ective. This requires a high e cient de-correlation step to limit the amount of quantization, thus avoiding a decrease of picture quality. In this thesis, video characterization has been conducted, resulting in novel video de-correlation concepts. Based on these concepts, a DCT-based codec exploiting symmetrical features, structure repetitions and prediction techniques in the DCT transform domain has been developed. From the results it can be concluded, that symmetrical features turn out to be an e cient method to compress video, preserving the demanded high picture quality at acceptable computational cost

    Embedded video compression for high dynamic range video

    No full text
    Modern digital TV-systems encompass digital demodulation and required audiovisual signal processing incorporating an uni ed-memory architecture. The bottleneck of such a System-on-Chip (SoC) is the connection to the external memory. As the video signal consumes the majority of the involved bandwidth, embedded video compression allows bandwidth reduction, enabling cost e ective systems. The embedded video compression must be visual lossless and cost e ective. This requires a high e cient de-correlation step to limit the amount of quantization, thus avoiding a decrease of picture quality. In this thesis, video characterization has been conducted, resulting in novel video de-correlation concepts. Based on these concepts, a DCT-based codec exploiting symmetrical features, structure repetitions and prediction techniques in the DCT transform domain has been developed. From the results it can be concluded, that symmetrical features turn out to be an e cient method to compress video, preserving the demanded high picture quality at acceptable computational cost

    A Software Development Kit to exploit RINA programmability

    No full text
    The Recursive InterNetwork Architecture (RINA) is a general architecture for all forms of computer networking, based on a single type of programmable layer that recurs as many times as required by the network designer. The recursion and programmability aspects of RINA are key to design flexible, heterogeneous networks while still bounding their complexity. In this paper we show how the programmability enabled by the RINA architecture can be exploited in practice by means of a Software Development Kit (SDK) developed for IRATI, the open source RINA implementation. A proof of concept validation of the SDK is carried out by experimenting with multiple policies in a distributed cloud network scenario

    Seamless network renumbering in RINA: Automate address changes without breaking flows!

    No full text
    Network renumbering in the IP world is a complicated and expensive procedure that has to be carefully planned and executed to avoid routing, security (firewall, ACLs) and transport connection integrity problems. The source of most of these issues is in the lack of a complete naming and addressing architecture in the TCP/IP protocol suite. This paper analyses the issues related to IP networks renumbering, identifying its root causes. Then it looks into how these issues affect renumbering in networks based on RINA, a network architecture with a complete naming scheme. Theoretical analysis backed up by experimentation results indicate that renumbering in RINA networks not only is seamless (can be done without impacting existing flows) but also does not require any special mechanisms

    IRATI : Open source RINA implementation for Linux

    No full text
    IRATI is a open source implementation of RINA for OS/Linux systems that allows researchers and innovators to experiment with RINA networks. RINA is a new Internetwork architecture that supports without the need of extra mechanisms mobility, mull-homing and Quality of Service, provides a secure and configurable environment and allows for a seamless adoption. IRATI implements the core RINA protocols and multiple policies to customize such protocols to different environments. Policies can be developed via a Software Development Kit (SDK). IRATI provides an API for applications to natively use RINA IPC services, as well as multiple monitoring utilities and example applications
    corecore